Yesterday we wrote about CERN releasing a formally verified VHDL library, and made the case that FPGAs belong in more creative toolkits. There’s a step past FPGAs that used to be unthinkable for an individual: having your own silicon made.
Breaking Taps did it, and documented every step between design and fabrication.
What was made
A custom microprocessor using transport triggered architecture with dual busses. In practice it functions more as a system-on-chip — memory and peripherals included, closer to a microcontroller than a bare CPU.
Transport triggered architecture is an unusual choice and a telling one. Instead of instructions that say “add these two registers,” a TTA program says “move this value to that port,” and the operation happens as a side effect of the data transport. It pushes scheduling complexity into the compiler and makes the hardware radically simpler — which is exactly the trade you want when you are the one building the hardware.
The toolchain
Design: Spade, a hardware description language from spade-lang.org — not VHDL or Verilog. That’s worth noting on its own. Spade is part of a small wave of modern HDLs trying to bring type systems and better ergonomics to hardware description, and seeing one used for a real tapeout rather than a toy is a meaningful data point.
Fabrication: wafer.space, an affordable IC fabrication service.
The distinction from the better-known Tiny Tapeout matters. Tiny Tapeout puts many small user designs onto a shared die as standard cells. Here, the whole chip is one circuit — using older fabrication technology, which results in a surprisingly large silicon die but gives you the entire chip.
Result: the finished processor was mounted on a PCB and demonstrated running simple programs via breadboard testing.
The honest difficulty assessment
Hackaday’s framing is the useful one: getting through this is “a level or two more difficult than passing the DRC standards for your PCB fabricator.”
Anyone who has had a board rejected over trace spacing can calibrate from that. Design rule checking for silicon is the same category of problem — a long list of geometric constraints you must satisfy before anyone will make your thing — just with more rules and a much longer, more expensive feedback loop.
And the cost caveat is stated plainly: this remains “a service for people with a few dollars in hand.” Custom silicon has moved from impossible for an individual to expensive for an individual. That is a genuine shift, and it is not the same as accessible.
Why this belongs in creative hardware
Not because you should tape out a chip. Almost nobody should.
It matters because of where the ceiling now is. The progression for someone building physical creative work used to stop at the microcontroller: Arduino, then ESP32, then maybe an FPGA if you needed deterministic timing, and then a wall. Custom silicon was for companies.
The wall has moved. Between Tiny Tapeout for small designs and wafer.space for whole chips, the path from “I have an idea for a circuit” to “I am holding the chip” exists for individuals with a project budget rather than a fab.
For most creative work the right answer will remain an off-the-shelf microcontroller, and pretending otherwise would be silly. But the specific cases where it wouldn’t — a piece needing an operation no commercial chip does efficiently, an artwork whose subject is the silicon, a run of identical objects where per-unit simplicity beats per-unit flexibility — are no longer hypothetical.